Frequently Asked Questions

Image Capture Tool

Q: Why does the Image Capture Tool not display live images after reviewing a set of previously recorded or reloaded images, even though I commanded the DAQ board back into Live Imaging mode?

Check that the Requested Image # control is set to 0. This value returns the most recently captured image, rather than a previously captured and uniquely numbered image which is returned when this control is set to a non-zero value.

Q: Why does the number of A-Scans in a displayed image (the Width) change erratically from one image to the next?

The image width is determined automatically by the period of the Image_sync synchronization pulse introduced by the user from an external source. Check that the Image_sync connection to the DAQ board is robust and has a constant period. Also check that the correct Image_sync input (LVCMOS, LVDS, or internal) is selected.

Q: Why are the Image_sync Trigger Too Fast or Image_sync Too Slow (Force Trig) indicators on?

When the Image_sync frequency is too high such that fewer than 256 A-scans are captured between consecutive rising edges, a Trigger Too Fast warning will occur and the image display may appear erratic if synchronization is temporarily lost.

When the Image_sync frequency is too slow or the signal is nonexistent, a Force Trigger event will occur and the displayed image will contain the most recently captured 256 A-scans, in a fashion similar to the way an oscilloscope typically behaves when a trigger signal is not detected.

Q: How do I open .dat buffer files saved using the Image Capture Tool?

Use the Image Capture Tool's LOAD BUFFER FROM FILE button on the Buffer tab, or use the axLoadFile(..) API command in AxsunOCTCapture.dll.

Buffer files saved using the Image Capture Tool or the axSaveFile(..) API command use a custom format which includes the image data as well as other metadata and are only interpretable by the Capture API.

Q: Why is the number of pixels per A-line always equal to 1024?

Each A-line is computed by Fourier transforming an input vector with length of 2048. Due to symmetry properties of the Fourier transform, half of the resulting transformed data is redundant and thus the vector length in all subsequent processing blocks is truncated to 1024 pixels.

Q: Why do objects in the image appear to flip or "mirror" at the top and bottom of the generated image?

Mirroring artifacts at the top and bottom of images are common in Fourier Domain OCT. Mirroring at the top of the image comes from the complex conjugate property of the Fourier transform, and the mirroring at the bottom comes from aliasing (frequency content higher than Nyquist). These artifacts are not specific to the Axsun system; rather, any FD-OCT system employing an FFT (swept source or spectrometer-based) will exhibit these phenomena.

Q: Why can't I increase the scan depth of my OCT system programmatically?

The maximum scan depth is fixed during system manufacturing and is based on the optical path length delay in the integrated k-clock interferometer. Reduction of the scan depth can be accomplished in software by simply cropping out regions from the generated images after they are retrieved into a client application.

Hardware Control Tool

Q: What is the meaning of the Width (samples) setting in the Windowing LUT Setup?

Each system produces a specific number of k-clock pulses based on the laser's wavelength tuning range and the k-clock configured scan depth. These k-clock pulses are used to directly control the sampling of the analog-to-digital converters and the number of samples $(N)$ typically falls between 1024 and 2048 (your system's exact value can be found on your laser test report). Because the Fourier transform computation requires input data with power-of-2 length, the sampled data is zero-padded from $N$ up to 2048 points in the same step as apodization/windowing and dispersion compensation. The Width (samples) setting is the number of valid points in the programmed window function (should be set = $N$) and then 2048–$N$ zeros are automatically appended to make the total number of points equal to 2048. If the Width(samples) setting is higher than the actual valid number of samples produced $(N)$, then invalid or spurious samples may not be zeroed-out and will likely cause artifacts in the computed image.

API Integration

Q: Should I use the AxsunOCTControl library or AxsunOCTControl_LW library when I'm designing a custom client application?

Use AxsunOCTControl_LW.dll if you are either creating an application for a non-Windows platform or are coding in a language other than C# and would like to avoid accessing AxsunOCTControl.dll through COM assembly registration. The AxsunOCTControl_LW library is also highly recommended for users interacting with the DAQ's advanced features (beyond basic operational mode selection).

Use AxsunOCTControl.dll if you are creating an application in C# or in a managed language which supports straightforward binding of Microsoft .NET assemblies on a 32- or 64-bit Windows platform, and if you are only interacting with the DAQ's basic features.

Interfaces

Q: Should I use the Ethernet or PCIe interface?

The Ethernet interface enables compact system architectures and requires bandwidth reduction via A-line subsampling when using the Bypass (Pipeline Mode) functionality to access upstream data during system integration, optimization, and debugging. Depending on your PC capabilities and resource usage from unrelated processes, Gigabit Ethernet speeds of approximately 850 Mbps are realizable with minimal or no packet loss.

On the other hand, the PCIe interface provides sufficient bandwidth to access Raw ADC Data at full A-line rates up to 100 kHz (without subsampling) but also requires being plugged into the PCIe slot of a desktop or workstation PC, or alternatively requires the use of a PCIe expansion Thunderbolt chassis.

Hardware Configuration

Q: I have an Integrated Engine with DAQ in the PCIe configuration, but physical constraints require that my laser and DAQ be so far apart that the legs of the Power Y Cable cannot reach both components.

Contact Axsun to purchase a second AC/DC supply and cable accessories for powering the two components separately, or procure a jumper to extend one leg of your existing Power Y Cable as needed to reach both components. Due to the wide range of possible physical configurations when the laser and DAQ are separated, Axsun cannot supply a 'one-size-fits-all' Power Y Cable. Connector details are provided here.

Q: What are the differences between the 500 MS/s DAQ and the 900 MS/s DAQ?

Several improvements and additional features were added to the 900 MS/s Ethernet/PCIe DAQ as an upgraded revision to the original 500 MS/s Ethernet/PCIe DAQ, including:

• Configuration for either direct external k-clocking or on-board FPGA-based resampling (this is a factory configuration and has compatibility constraints with the associated laser engine's K-clock free spectral range and output type — i.e. analog or digital).

• Startup timing now meets bus enumeration requirements when using the PCIe interface and applying power to the DAQ concurrently with the motherboard power. There is no longer a requirement to sequence the DAQ power prior to the motherboard power.

• Ability to configure the DAQ board to be PCIe bus-powered instead of using an external 12V power supply.

• Increased the ADC max sampling rate from 500 MS/s to 900 MS/s.

• Added compatibility with Axsun laser A-line rates up to 200 kHz (or 400 kHz with single channel in some instances) when using the PCIe interface.

• Added optional sweep trigger output and software-selectable Image_sync input signals on the exposed board edge when installed in a traditional workstation's PCIe slot.

The 900 MS/s version is intended to be a drop-in replacement for the 500 MS/s version in both Ethernet and PCIe configurations, with the following considerations:

• Software: No changes to the software interfaces. Continue to use the most recent available versions of AxsunOCTCapture and AxsunOCTControl_LW libraries, or the Image Capture Tool and Hardware Control Tool GUIs.

• Electrical/Electronic: No changes to power supply requirements, connector types, trigger signal levels, etc. except the addition of a connector on the exposed board edge for sweep trigger output and Image_sync input.

• Mechanical: Some connector receptacle locations have shifted slightly or had orientation flipped, but external cable lengths should not be impacted. A small mezzanine PCB now houses the ADC circuitry, but envelope dimensions are unchanged. Refer to the Dimensions page for links to CAD models.

• Environmental: No changes to required storage and operating conditions. Thermal management of the FGPA via on-board blower is unchanged.

• Product Numbering:

  • The 1060 nm and 1310 nm Axsun Integrated Engine product numbers (AXP50124-16, AXP50124-17) remain unchanged, as the DAQ is physically stacked on the laser engine and thus managed at a subassembly level; its version is specified in the associated sales quotation.

  • For the PCIe DAQ configuration (physically separate from the laser engine), production release of the 900 MS/s version caused a part number update to accommodate selection of clocking scheme: either direct external K-clocking (AXP52013-1) or internal clocking with resampling (AXP52013-2). Pre-release distribution of the 900 MS/s version was under product number AXP50150 (as the 500 MS/s version) with the ADC version and clocking scheme as specified in the associated sales quotation.